Last night I added an 74HC138 3 into 8 line decoder to my project. Ignore the fact that I’m not using resistors with the LED’s. It’s just for testing until I decide just how I’m going to handle them.
Essentially it takes a 3 bit binary value (3 address inputs) that represents 0 to 7, and enables one of 8 possible outputs. It has many uses, enabling one of several SPI devices, I’ve used it in the past to replace rotary switches to interface with analog devices. In this specific case, I’m going to use it to select what “slot” I want to look at to read/write an address bus, set registers, for my project. I have Apple II compatible card edge slot connectors that I can put onto a protoboard and interface with “Real” hardware. I’m not quite that far yet, as I’m just beginning to look at memory mapping, loading “Roms” from an SD card into the memory block on the RAM. One thing I did decide was using a configuration file for memory mapping. Since I can address the full 64K with the emulator I can map the memory however I want and load whatever I need into the map.
Another thought crossed my mind, if I were to take a 40 pin DIP connector and wire the outputs and inputs as appropriate address bus, data bus, and other outputs, if I could emulate the 6502 directly in an Apple II, using the apple’s clock pulse to trigger an interrupt that stepped the emulator once cycle. It’s not actually that outrageous an idea. By doing that I can inspect and step data on a more modern PC, or even modify or replace portions of memory.
I last left off with the makings of an address decoder using a pair of 74hc595 serial to parallel shift registers. I added some LED indicators to the address bus so I can see the activity as I cycled through.
Understand that I am primarily a developer, electronics comes naturally to me, but proficiency comes with experience so forgive any of my “worst practices” that might make an electrical engineer cringe.
This time around I had an old 64kb static ram chip. It was from an old PC secondary cache which were used in banks of 4. I also added LED indicators to the data bus. The main reason was to see if the address bus was iterating through cells in the RAM chip properly. Most memory initializes with alternate pages as all zeroes and either a random or fixed pattern. This allows you to check the ram for bit errors. This worked for me because I tied the enable output line to the clock.
The one thing I was stuck on was the data bus. I didn’t want to use 8 pins for I/O on the Arduino Nano I was testing with. Everything I read was using two shift registers for the data bus. Then I remembered I has a bunch of 74HC299 universal shift registers which allows you to shift data in or out serially, and latch parallel data or set the outputs for the ram to read or write. All done with 5 pins, not much of a savings until you consider you can share every pin as an SPI bus. Since these memory operations are synchronous, you can use the cs on different pins, everything else can share the rest of the bus.
This is still a work in progress for this part so I havent considered what passive components to use for noise isolation or other things. What I am thinking through now is how to tie the ram read with the shift out, and ram write with the shift in.
More to come.